Guang Yang 1,3Lingbo Xu 1,3Can Cui 1,*Xiaodong Pi 2,3,**[ ... ]Rong Wang 2,3,***
Author Affiliations
Abstract
1 Key Laboratory of Optical Field Manipulation of Zhejiang Province, Department of Physics, Zhejiang Sci-Tech University, Hangzhou 310018, China
2 State Key Laboratory of Silicon and Advanced Semiconductor Materials & School of Materials Science and Engineering, Zhejiang University, Hangzhou 310027, China
3 Institute of Advanced Semiconductors & Zhejiang Provincial Key Laboratory of Power Semiconductor Materials and Devices, Hangzhou Innovation Center, Zhejiang University, Hangzhou 311200, China
Molten-alkali etching has been widely used to reveal dislocations in 4H silicon carbide (4H-SiC), which has promoted the identification and statistics of dislocation density in 4H-SiC single crystals. However, the etching mechanism of 4H-SiC is limited misunderstood. In this letter, we reveal the anisotropic etching mechanism of the Si face and C face of 4H-SiC by combining molten-KOH etching, X-ray photoelectron spectroscopy (XPS) and first-principles investigations. The activation energies for the molten-KOH etching of the C face and Si face of 4H-SiC are calculated to be 25.09 and 35.75 kcal/mol, respectively. The molten-KOH etching rate of the C face is higher than the Si face. Combining XPS analysis and first-principles calculations, we find that the molten-KOH etching of 4H-SiC is proceeded by the cycling of the oxidation of 4H-SiC by the dissolved oxygen and the removal of oxides by molten KOH. The faster etching rate of the C face is caused by the fact that the oxides on the C face are unstable, and easier to be removed with molten alkali, rather than the C face being easier to be oxidized.
Journal of Semiconductors
2024, 45(1): 012502
李国峰 1,2,*陈泓谕 1杭伟 1韩学峰 2,3[ ... ]王蓉 2,3
作者单位
摘要
1 浙江工业大学超精密加工研究中心, 杭州 310023
2 浙江大学杭州国际科创中心, 先进半导体研究院和浙江省宽禁带功率半导体材料与器件重点实验室, 杭州 311200
3 浙江大学硅及先进半导体材料全国重点实验室&材料科学与工程学院, 杭州 310027
表面无损伤、粗糙度低的半导体碳化硅(4H-SiC)衬底是制造电力电子器件和射频微波器件的理想衬底材料, 在新能源、轨道交通、智能电网和5G通信等领域具有广阔的应用前景。4H-SiC衬底的加工过程包括切片、减薄、研磨、抛光和清洗, 在4H-SiC衬底加工过程中引入的表面/亚表面损伤均严重影响材料性能、同质外延薄膜性质, 以及器件性能和可靠性。本文将重点介绍4H-SiC晶片在切片、减薄、研磨、抛光等各个加工环节中表面/亚表面损伤的形成和去除机制, 基于4H-SiC晶圆表面/亚表面损伤的检测方法, 综述亚表面损伤的形貌和表征参量, 并简单介绍三种常见的亚表面损伤的消除方法, 分析其技术优势和发展瓶颈, 对去除亚表面损伤工艺的发展趋势进行了展望。
半导体 衬底晶圆 表面/亚表面损伤 晶圆加工 semiconductor 4H-SiC 4H-SiC substrate wafer surface/subsurface damage wafer processing 
人工晶体学报
2023, 52(11): 1907
隋占仁 1,2,*徐凌波 1,2崔灿 1王蓉 2,3[ ... ]韩学峰 2,3
作者单位
摘要
1 浙江理工大学物理系,浙江省光场调控技术重点实验室,杭州 310018
2 浙江大学杭州国际科创中心, 浙江省宽禁带半导体重点实验室, 杭州 311200
3 浙江大学材料科学与工程学院, 硅材料国家重点实验室, 杭州 310027
宽禁带半导体材料碳化硅(SiC)凭借着其高击穿场强、高热导率、耐高温、高化学稳定性和抗辐射等优异性能, 在电力电子器件领域尤其是高温、高频、高功率等应用场景下有着巨大潜力。大尺寸、高质量、低成本的单晶SiC的制备是SiC相关半导体产品规模化应用的前提。顶部籽晶溶液生长(TSSG)法生长的单晶SiC有着晶体质量高、易扩径、易p型掺杂等优势, 有望成为制备单晶SiC的主流方法。但目前由于该方法涉及的生长机理复杂, 研究者对其内部机理的理解还不够充分, 难以对TSSG生长设备和方法进行有效的改进与优化。利用计算机对TSSG法生长单晶SiC生长过程进行数值模拟被认为是对其内部机理探究的有效途径之一。本文首先回顾了TSSG法生长单晶SiC和相关数值模拟分析的发展历程, 介绍了TSSG法生长单晶SiC和数值模拟的基本原理, 然后介绍了数值模拟方法计算分析TSSG法生长单晶SiC模型涉及的主要模块、影响单晶生长的主要因素(如马兰戈尼力、浮力、电磁力等), 以及对数值模型的优化方法。最后, 指出了数值模拟方法计算分析TSSG法生长单晶SiC在未来的重点研究方向。
宽禁带半导体 碳化硅 顶部籽晶溶液生长法 数值模拟 有限元 晶体生长 机器学习 wide bandgap semiconductor silicon carbide top-seeded solution growth numerical simulation finite element crystal growth machine learning 
人工晶体学报
2023, 52(6): 1067
张俊然 1,2,3朱如忠 2,3张玺 2,3张序清 2,3[ ... ]王蓉 2,3
作者单位
摘要
1 浙江大学物理学院, 杭州 310027
2 浙江大学杭州国际科创中心, 先进半导体研究院和浙江省宽禁带功率半导体材料与器件重点实验室, 杭州 311200
3 浙江大学材料科学与工程学院, 硅材料国家重点实验室, 杭州 310027
4 浙江机电职业技术学院增材制造学院, 杭州 310053
作为制备半导体晶圆的重要工序, 线锯切片对半导体晶圆的质量具有至关重要的影响。本文以发展最成熟的硅材料为例, 介绍了线锯切片技术的基本理论, 特别介绍了线锯切片技术的力学模型和材料去除机理, 并讨论了线锯制造技术及切片工艺对材料的影响。在此基础上, 综述了线锯切片技术在碳化硅晶圆加工中的应用和技术进展, 并分析了线锯切片技术对碳化硅晶体表面质量和损伤层的影响。最后, 本文指出了线锯切片技术在碳化硅晶圆加工领域面临的挑战与未来的发展方向。
线锯切片 硬脆材料 单晶碳化硅 晶圆加工 砂浆线切割 金刚线切割 wire saw slicing brittle-and-hard material single crystal silicon carbide wafer processing slurry sawing diamond wire sawing 
人工晶体学报
2023, 52(3): 365
张玺 1,2朱如忠 1,2张序清 1,2王明华 3[ ... ]皮孝东 1,2
作者单位
摘要
1 浙江大学杭州国际科创中心先进半导体研究院,浙江省宽禁带功率半导体材料与器件重点实验室,杭州 311200
2 浙江大学硅材料国家重点实验室,材料科学与工程学院,杭州 310027
3 杭州乾晶半导体有限公司,杭州 311200
4 浙江机电职业技术学院,杭州 310053
研磨作为4H碳化硅(4H-SiC)晶片加工的重要工序之一,对4H-SiC衬底晶圆的质量具有重要影响。本文研究了金刚石磨料形貌和分散介质对4H-SiC晶片研磨过程中材料去除速率和面型参数的影响,基于研磨过程中金刚石磨料与4H-SiC晶片表面的接触情况,推导出简易的晶片材料去除速率模型。研究结果表明,磨料形貌显著影响4H-SiC晶片的材料去除速率,材料去除速率越高,晶片的总厚度变化(TTV)越小。由于4H-SiC中C面和Si面的各向异性,4H-SiC晶片研磨过程中C面的材料去除速率高于Si面。在分散介质的影响方面:水基体系研磨液的Zeta电位绝对值较高,磨料分散均匀,水的高导热系数有利于控制研磨过程中的盘面温度;乙二醇体系研磨液的Zeta电位绝对值小,磨料易发生团聚,增大研磨过程的磨料切入深度,晶片的材料去除速率提高,晶片最大划痕深度随之增大。
4H碳化硅 研磨 金刚石磨料 分散介质 材料去除速率 面型参数 4H-SiC lapping diamond abrasive dispersion medium material removal rate surface parameter 
人工晶体学报
2023, 52(1): 48
Guang Yang 1,2,3Hao Luo 2,3Jiajun Li 2,3Qinqin Shao 2,3[ ... ]Rong Wang 2,3,***
Author Affiliations
Abstract
1 Key Laboratory of Optical Field Manipulation of Zhejiang Province, Department of Physics, Zhejiang Sci-Tech University, Hangzhou 310018, China
2 State Key Laboratory of Silicon Materials and School of Materials Science and Engineering, Zhejiang University, Hangzhou 310027, China
3 Hangzhou Innovation Center, Zhejiang University, Hangzhou 311200, China
4 School of Materials Science and Engineering & Henan Institute of Advanced Technology, Zhengzhou University, Zhengzhou 450001, China
Discrimination of dislocations is critical to the statistics of dislocation densities in 4H silicon carbide (4H-SiC), which are routinely used to evaluate the quality of 4H-SiC single crystals and homoepitaxial layers. In this work, we show that the inclination angles of the etch pits of molten-alkali etched 4H-SiC can be adopted to discriminate threading screw dislocations (TSDs), threading edge dislocations (TEDs) and basal plane dislocations (BPDs) in 4H-SiC. In n-type 4H-SiC, the inclination angles of the etch pits of TSDs, TEDs and BPDs in molten-alkali etched 4H-SiC are in the ranges of 27°?35°, 8°?15° and 2°?4°, respectively. In semi-insulating 4H-SiC, the inclination angles of the etch pits of TSDs and TEDs are in the ranges of 31°?34° and 21°?24°, respectively. The inclination angles of dislocation-related etch pits are independent of the etching duration, which facilitates the discrimination and statistic of dislocations in 4H-SiC. More significantly, the inclination angle of a threading mixed dislocations (TMDs) is found to consist of characteristic angles of both TEDs and TSDs. This enables to distinguish TMDs from TSDs in 4H-SiC.Discrimination of dislocations is critical to the statistics of dislocation densities in 4H silicon carbide (4H-SiC), which are routinely used to evaluate the quality of 4H-SiC single crystals and homoepitaxial layers. In this work, we show that the inclination angles of the etch pits of molten-alkali etched 4H-SiC can be adopted to discriminate threading screw dislocations (TSDs), threading edge dislocations (TEDs) and basal plane dislocations (BPDs) in 4H-SiC. In n-type 4H-SiC, the inclination angles of the etch pits of TSDs, TEDs and BPDs in molten-alkali etched 4H-SiC are in the ranges of 27°?35°, 8°?15° and 2°?4°, respectively. In semi-insulating 4H-SiC, the inclination angles of the etch pits of TSDs and TEDs are in the ranges of 31°?34° and 21°?24°, respectively. The inclination angles of dislocation-related etch pits are independent of the etching duration, which facilitates the discrimination and statistic of dislocations in 4H-SiC. More significantly, the inclination angle of a threading mixed dislocations (TMDs) is found to consist of characteristic angles of both TEDs and TSDs. This enables to distinguish TMDs from TSDs in 4H-SiC.
Journal of Semiconductors
2022, 43(12): 122801
杨光 1,2刘晓双 2,3李佳君 2,3徐凌波 1[ ... ]王蓉 2,3
作者单位
摘要
1 浙江理工大学物理系, 浙江省光场调控技术重点实验室, 杭州 310018
2 浙江大学杭州国际科创中心, 杭州 311200
3 浙江大学材料科学与工程学院, 硅材料国家重点实验室, 杭州 310027
4H碳化硅(4H-SiC)单晶具有禁带宽度大、载流子迁移率高、热导率高和稳定性良好等优异特性, 在高功率电力电子、射频/微波电子和量子信息等领域具有广阔的应用前景。经过多年的发展, 6英寸(1英寸=2.54 cm)4H-SiC单晶衬底和同质外延薄膜已得到了产业化应用。然而, 4H-SiC单晶中的总位错密度仍高达103~104 cm-2, 阻碍了4H-SiC单晶潜力的充分发挥。本文介绍了4H-SiC单晶中位错的主要类型, 重点讲述4H-SiC单晶生长、衬底晶圆加工以及同质外延过程中位错的产生、转变和湮灭机理, 并概述4H-SiC单晶中位错的表征方法, 最后讲述了位错对4H-SiC单晶衬底和外延薄膜的性质, 以及4H-SiC基功率器件性质的影响。
4H碳化硅 位错 单晶 外延 电学性质 光学性质 4H silicon carbide dislocation single crystal epitaxy film electrical property optical property 
人工晶体学报
2022, 51(9-10): 1673
Author Affiliations
Abstract
1 State Key Laboratory of Silicon Materials & School of Materials Science and Engineering, Zhejiang University, Hangzhou 310027, China
2 Institute of Advanced Semiconductors & Zhejiang Provincial Key Laboratory of Power Semiconductor Materials and Devices, Hangzhou Innovation Center, Zhejiang University, Hangzhou 311200, China
3 Key Laboratory of Optical Field Manipulation of Zhejiang Province, Department of Physics, Zhejiang Sci-Tech University, Hangzhou 310018, China
4 School of Materials Science and Engineering & College of Chemistry, Zhengzhou University, Zhengzhou 450001, China
In this work, we propose to reveal the subsurface damage (SSD) of 4H-SiC wafers by photo-chemical etching and identify the nature of SSD by molten-alkali etching. Under UV illumination, SSD acts as a photoluminescence-black defect. The selective photo-chemical etching reveals SSD as the ridge-like defect. It is found that the ridge-like SSD is still crystalline 4H-SiC with lattice distortion. The molten-KOH etching of the 4H-SiC wafer with ridge-like SSD transforms the ridge-like SSD into groove lines, which are typical features of scratches. This means that the underlying scratches under mechanical stress give rise to the formation of SSD in 4H-SiC wafers. SSD is incorporated into 4H-SiC wafers during the lapping, rather than the chemical mechanical polishing (CMP).In this work, we propose to reveal the subsurface damage (SSD) of 4H-SiC wafers by photo-chemical etching and identify the nature of SSD by molten-alkali etching. Under UV illumination, SSD acts as a photoluminescence-black defect. The selective photo-chemical etching reveals SSD as the ridge-like defect. It is found that the ridge-like SSD is still crystalline 4H-SiC with lattice distortion. The molten-KOH etching of the 4H-SiC wafer with ridge-like SSD transforms the ridge-like SSD into groove lines, which are typical features of scratches. This means that the underlying scratches under mechanical stress give rise to the formation of SSD in 4H-SiC wafers. SSD is incorporated into 4H-SiC wafers during the lapping, rather than the chemical mechanical polishing (CMP).
Journal of Semiconductors
2022, 43(10): 102801
Author Affiliations
Abstract
1 State Key Laboratory of Silicon Materials & School of Materials Science and Engineering, Zhejiang University, Hangzhou 310027, China
2 School of Materials Science and Engineering & College of Chemistry, Zhengzhou University, Zhengzhou 450001, China
3 Institute of Advanced Semiconductors & Zhejiang Provincial Key Laboratory of Power Semiconductor Materials and Devices, Hangzhou Innovation Center, Zhejiang University, Hangzhou 311215, China
Hyperdoping that introduces impurities with concentrations exceeding their equilibrium solubility has been attracting great interest since the tuning of semiconductor properties increasingly relies on extreme measures. In this review we focus on hyperdoped silicon (Si) by introducing methods used for the hyperdoping of Si such as ion implantation and laser doping, discussing the electrical and optical properties of hyperdoped bulk Si, Si nanocrystals, Si nanowires and Si films, and presenting the use of hyperdoped Si for devices like infrared photodetectors and solar cells. The perspectives of the development of hyperdoped Si are also provided.Hyperdoping that introduces impurities with concentrations exceeding their equilibrium solubility has been attracting great interest since the tuning of semiconductor properties increasingly relies on extreme measures. In this review we focus on hyperdoped silicon (Si) by introducing methods used for the hyperdoping of Si such as ion implantation and laser doping, discussing the electrical and optical properties of hyperdoped bulk Si, Si nanocrystals, Si nanowires and Si films, and presenting the use of hyperdoped Si for devices like infrared photodetectors and solar cells. The perspectives of the development of hyperdoped Si are also provided.
Journal of Semiconductors
2022, 43(9): 093101
张序清 1,2,*罗昊 1李佳君 2王蓉 2[ ... ]皮孝东 1,2
作者单位
摘要
1 浙江大学硅材料国家重点实验室材料科学与工程学院,杭州 310027
2 浙江大学杭州国际科创中心,杭州 311200
碳化硅(SiC)具有禁带宽度大、电子饱和漂移速度高、击穿场强高、热导率高、化学稳定性好等优异特性,是制备高性能功率器件等半导体器件的理想材料。得益于工艺简单、操作便捷、设备要求低等优点,湿法腐蚀已作为晶体缺陷分析、表面改性的常规工艺手段,应用到了SiC晶体生长和加工中的质量检测以及SiC器件制造。根据腐蚀机制不同,湿法腐蚀可以分为电化学腐蚀和化学腐蚀。本文综述了不同湿法腐蚀工艺的腐蚀机理、腐蚀装置和应用领域,并展望了SiC湿法腐蚀工艺的发展前景。
碳化硅 湿法腐蚀 电化学腐蚀 化学腐蚀 晶体缺陷 晶体表面 silicon carbide wet etching electrochemical etching chemical etching crystal defect crystal surface 
人工晶体学报
2022, 51(2): 333

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